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New Landing Design to Reduce Thermal Pad Failures

It’s hands down the most frustrating part of the PCB process. You’ve finally finished your design. All the traces are correct, and the IC landings are to manufacturer’s specifications. You produce a short run of test boards, which all perform perfectly. You want the best results, so you select a reputable domestic board house for production and a quality assembly shop to do the soldering. When the finished boards arrive, everything looks great. You’re in high spirits and congratulate yourself on a job well done. Then the reports start coming in:

“My board worked for a week but won’t boot up now. I need a replacement.”

“We’re seeing a high percentage of failures during QA.”

“My order is DOA—didn’t you guys test this thing before you sent it?”

You’ve done everything correctly, by the book, passed every preliminary test and things are still going wrong. What’s happening here?

I found myself in a similar situation while working on a client project. The failure rates were only a few percent, but in volume, those costs quickly run into thousands of dollars. We poured over every possibility and traced the problem down to a single high-power QFP IC whose center thermal pad was not being soldered consistently. There was nothing wrong with the board or the soldering process—the default method for soldering heat slugs to boards was just inherently flawed. Looking at the costs and reliability problems, we knew we had to do better.

After testing a variety of different designs, we found one that not only was vastly more reliable but didn’t add to the cost of manufacturing. The solution translates well to similar IC packages. We were back up and running again, but what was the problem in the first place?

Problem: Uncontrollable, Unpredictable Solder

At first, we had used the standard, manufacturer-recommended method for heat sinking. We placed large copper pads on both sides of the board under the chip, connected them with vias to conduct heat, and applied full solder paste coverage for the best thermal contact. As straightforward and intuitive as the standard approach is, it obviously has some problems.

In this case, the culprit is solder’s unpredictable behavior once melted, which puts every board at risk of a poor heat sink connection. We’ve all seen the result of bad solder connections: failures in QA or, worse, shortened life and failure in the field. The problem is so pervasive you might be tempted to accept it as the unavoidable cost of doing business. But if we look at the causes of the chaos, we can find ways to offset them. There are two main mechanisms that cause these failures: solder wicking through vias and solder movement under large pads.

Failure from Solder Wicking Through Vias

This failure mode is the most obvious. If the landing pad is covered in tiny holes, molten solder can run through them to the back of the board. Now there is less solder connecting the pad, and the solder that is in place was distributed unevenly. Worse, the wicking will vary from board to board. Common vias aren't precision components, and the amount of copper plated onto them varies. Some may be wider than intended and others plated partially or fully shut. Identically designed boards that went through the same manufacturing process may now have significantly different thermal responses.

Failure from Solder Movement Under Large Pads

Again, we have to consider the unpredictability of solder movement during reflow. If there is not enough solder under the slug (or the board is warped), capillary action can pull the solder to one side of the chip. Attempt to correct this by applying more solder, and the chip might float right off the signal pins. Excess solder can overflow the pad, sending solder balls out to short or bridge other areas of the board. The varying amount of solder pulled through the vias only exacerbates the problem and hinders attempts to correct for it by adjusting the amount of paste used.


Fortunately, the solution is as straightforward as the problems themselves. We simply must prevent the solder from wicking through the vias or moving past it’s area of application. There are two elements of this fix.

First, apply solder mask over the landing pad and open circular “islands” for paste application

If the solder won’t behave over a large area, we can break that area up into an array of smaller, better behaved areas, since solder mask restricts the paste to its area of application. While this reduces the amount of solder connecting the chip to the board, it increases the consistency. The circular solder paste apertures release the solder more reliably than those with sharp corners, which helps prevent loose solder balls.

Second, surround the “islands” with small (~12 mil or smaller) vias tented (covered with solder mask).

Removing the vias from the immediate area being soldered and tenting them prevents any stray solder from wicking down to the other side of the board while still providing good thermal transfer to the pads underneath. You should add these vias as close as possible (nearly tangentially) to the islands. The solder mask tenting will block any solder that wicks onto an exposed via due to manufacturing tolerances.

Keep in mind these few key rules when implementing:


  • Make sure the pad under the chip is a solid copper plane to spread out the heat.
  • Use a hexagonal packing pattern for the solder islands to give maximum coverage of the heat slug.
  • The solder mask tents should be the same size as the resist mask opening on these islands, providing 100 percent coverage. This ensures that adequate solder is present to bond to the chip.
  • Don’t use thermal spokes on any layer of the vias. Thermal spokes will reduce their thermal conductivity.
  • Vias should be solder mask tented, not plugged or filled. The epoxy in solder mask plugged vias may not cure fully and will tend to expand and erupt if subject to enough heat.


  1. Top Layer: Soldermask and pastemask opening.
  2. Plated through hole with no soldermask opening placed very close to, but not tangent with soldermask opening.
  3. Copper pad, top layer.
  • Soldermask opening should be greater than or equal to one half of the thermal area of component body for efficient transfer of heat.
  • All plated through-holes should be vias tied to the same net as copper pour.
  • Vias should not have thermal relief on any layer.
  • Vias should not have a soldermask opening on the top or bottom layer.

A captive solder pad that is protected from the wicking effect created by the large diameter via solution.


A side view of the board illustrating placement of joints, mask openings, and vias.


The most eficient way to implement this design is to make it part of your package definition so that it’s uniformly applied to all similar parts. Unfortunately, many CAD packages do not support the direct addition of vias and copper planes to package designs. An easy workaround is to create square SMD pads to act as the top and bottom copper sinks, as well as small plated through-hole pads to act as the vias. These can then be set as unconnected pins in your component definition. You may have to create custom paste and solder masks for these pins, but this is usually not too difficult.

Try this design out for your next project, and you’ll be happy with the results. This design’s benefits speak for themselves: fewer failures, a more consistent product, fewer angry phone calls, and (of course) a fatter bottom line.

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