|
Characteristic
|
IPC-600F Guideline *
|
Sunstone Inspection
|
|
Board edges
|
- Haloing and nicks maximum .100" or 50% of distance to nearest conductor, whichever is less.
- No metal burrs; must be clean cut.
|
|
|
Bow and twist
|
- General 1.5% max.
- SMT boards 0.75%. max.
|
|
|
Conductor thickness
|
- Table 3-9 (external)
- Table 3-8 (internal)
|
- One coupon per multilayer job micro sectioned
- Sample of panels PTH copper thickness after copper plating (surface plating inferred from PTH plating)
|
|
Copper plating thickness, minimum in holes
|
- Class 2, avg. .0008" , thin spots .0007"
- Class 3, avg. .001", thin spots .0008" (Table 3-2)
|
- Sample of panels PTH copper thickness after copper plating
|
|
Copper plating voids
|
- Class 2 - One Cu void allowed per hole in not more than 5% of the holes.
- Class 3 - No Cu voids allowed.
- Shall not exceed 5% of hole length or 90° of circumference (Table 3-3)
|
- 100% visual inspection after etching·
- One coupon per multilayer job micro sectioned
|
|
Delamination/blisters
|
- Evaluated in accordance with IPC-A-600
- Class 1 now same as Class 2, 3 (2.3.3)
- Evidence of delamination in micro section now refers to 2.3.3 instead of being automatically nonconforming (3.1.4)
|
- Post-final surface finish inspection
|
|
Solder Dewetting
|
- Ground planes and traces: allowed
- Solder connection areas: max. 5% (Class 2, 3)
|
- Post-final surface finish inspection
|
|
Finish plating voids
|
- Class 2 - Three solder voids allowed per hole in not more than 5% of the holes.
- Class 3 - One solder void per hole in not more than 5% of the holes.
- Shall not exceed 5% of hole length or 90° of circumference (Table 3-3)
|
- Post-final surface finish inspection
|
|
Foreign inclusions
|
- Evaluated in accordance with IPC-A-600, except no maximum dimension specified (3.3.2.1)
|
- In-process inspection (after etching, before mask)
|
|
Gold thickness
|
- Class 2 - min. 30µ"· Class 3 - min. 50µ"· Solderable gold - 30µ" maximum.
|
- Beta-backscatter or XRF measurement on sample after gold plating
|
|
Hole location
|
- As specified on procurement document.
|
- Not specifically checked, unless critical dimensions are noted on the master drawing; controlled by PM on drill machine
|
|
Hole sizes
|
- ±.004" for plated through holes, ±.003 for non-plated through holes, +.003 / - hole size for vias, unless otherwise specified by customer
|
- Sample at Post-final surface finish inspection
|
|
Solder Mask coverage
|
|
- Post-final surface finish inspection
|
|
Solder Mask cure & adhesion
|
- No tackiness
- Blisters/delamination: 2 per side, max. .010 in, does not reduce spacing by more than 25%
- Soda-strawing is now defined as applying to DFSM only (2.9.9)
|
- Post-final surface finish inspection
|
|
Solder Mask in holes
|
- Allowed only in holes in which are not to be soldered.
|
- Post-final surface finish inspection ***
|
|
Solder Mask registration
|
|
- Post-final surface finish inspection
|
|
Solder Mask thickness
|
- Visual coverage; no thickness requirement
|
- Not checked unless specifically required by drawing
|
|
Solder Mask touch-up
|
- Touch-up material specified (IPC-A-600F 2.9.1)
|
|
|
Measles/crazing
|
- Evaluated in accordance with IPC-A-600
- Measles acceptable for all except high voltage applications [not defined] (2.3.1)
- Crazing spec. now same as delamination except 50% of distance between conductors may be spanned; also now shows pictures of crazing (2.3.2)
|
- In-process inspection (after etch, before solder mask)
|
|
Min. ann. ring NPTH
|
- Class 2: No breakout allowed.
|
|
|
Min. ann. ring-internal
|
- Class 2: 90° breakout allowed
|
- Process control using micro sections (selecting the design review option ensures design is within capability). ***
|
|
Min. external ann. ring - PTH
|
- Class 2: 90° breakout allowed except at junction of pad and trace, where .002" minimum is allowed.
|
- In-process inspection (after etch, before mask). Selecting the design check option ensures design is within capability). ***
|
|
Nomenclature (silkscreen)
|
- Refers to IPC-A-600 for legibility requirements Marking ink on surface mount lands no longer nonconforming (IPC-A-600F 2.8.3)
|
|
|
Nonwetting
|
|
- Post-final surface finish inspection
|
|
Pink ring
|
|
- In-process inspection (after etch, before mask)
|
|
Pits and voids in base material
|
- Acceptable if no larger than 0.8 mm [.03 in] and no more than 5% of board area
|
- In-process inspection (after etch, before mask)
|
|
Plating adhesion
|
- Tape test required (slivers coming off with tape is not cause for rejection)
|
- In-process inspection (after etch, before mask)
|
|
Plating cracks
|
- See Table 3-7 (basically none allowed)
|
- In-process inspection (after etch, before mask); One coupon per multilayer job micro sectioned
|
|
Resin fill of blind/buried vias
|
- Buried vias shall be at least 60% filled with resin (3.3.14)
|
- One coupon per multilayer job micro sectioned
|
|
Routing tolerances
|
- As specified on procurement document.
|
- Final inspection; sample checked per customer drawing or default to ±.010
|
|
Spacing reduction
|
- When not specified on the customer's documentation, 30% allowed for class 2; 20% allowed for class 3.
|
- In-process inspection (after etch, before mask)
|
|
Tenting (via holes)
|
|
- Post-final surface finish inspection (when required) ***
|
|
Tin/lead, solder coat
|
- Unfused tin-lead: min. .0003"
- Fused or HAL: coverage and solderable.
- Sidewalls do not have to be covered.
|
- Post-final surface finish inspection; solderability process control on multilayer coupons
|
|
Trace width
|
- Class 2, 3: When not specified on the customer's documentation, 20% max. line loss, additional 20% for isolated defects
|
- In-process inspection (after etch, before mask)
|
|
Weave exposure and exposed/disrupted fibers
|
- Acceptable for Class 1, 2, 3 as long as minimum conductor spacing is met.
|
- In-process inspection (after etch, before mask)
|
|
Weave texture
|
|
|
